The LM3485 hysteretic buck DC/DC works and supplies the 12V for the Fairchild super junction fets.
The 0-series PFC board is good enough for my purposes now, but interleaving in a totempole (stacked) topology offers more flexibility.
And of course, a reduction of ripple currents, which means: less capacitors and a smaller input filter.
I have to redesign the board anyway, so I am going for interleaving.
TOPOLOGY OF A MODULAR INTERLEAVING PFC TOTEMPOLE
Interleaving works with phases, parallel boost branches at the PFC input, that are driven out of sync, i.e. with a phase shift, hence the name.
A PFC board will have two phases, since ripple reduction works best with a number of phases that is a power of two. So 2, 4, 8 phases.
A phase has a fixed amp rating (12Arms). Maximum power depends on the number of boards and the input voltage.
A maximum of four boards means 96Arms in total, which equates to 7200W @ low line 110/115Vac (75Vac).
Enough for the 6600W maximum output power per module set.
The low amps per board allow the use of fast-on connectors.
SUPER JUNCTION FET (PFC DESIGN GUIDE)
There is an interesting bit of information about super junction fets in this design guide
http://www.infineon.com/dgdl/Infineo...4a62c75a923b05
for a single phase PFC with an output rating of 1200W.
On page 12 just below equation 22:
super junction Si mosfets may also have “ZVS” turn-off with fast drive.
It seems that the achilles heel of the C2M0080120D mosfet is safe operation at high peak amps and high voltage.
Here is what can be found in the specs when a comparison is made with the Fairchildsemi FCH104N60 :
The SOA graph in figure 10 of the FCH104N60 datasheet shows that it can withstand a 10usec
110A pulse @ Tc=25C, Tj=150C and Vds<= 550V.
In comparison, @ 450V (absolute minimum for PFC) C2M0080120D SOA:
30A, 10usec @ Tc=25C, Tj=150C.
CONTROLLER FOR INTERLEAVING
I tried a TI interleaving controller and I didn't like it. It had too many design issues with a higher number of phases.
I do like the Infineon ICE2 controller and although it has a single output, it runs at a fixed frequency, so delay lines can be used to generate phase shift and those are still in full production.
The quick, easy and reliable solution: a cascade of all silicon 500nsec Maxim DS1100Z SOIC8.
The tap points at every 100 nsec allow application with 2, 4 and 8 phase interleaving.
https://datasheets.maximintegrated.com/en/ds/DS1100.pdf
CURRENT SENSING
The ICE2 needs a negative voltage at the current sense input for regulation and soft over-current.
A single LEM HTFS current transformer is more efficient than ground line resistors and probably also less expensive.
PEAK OVERCURRENT / LOW VOLT
For cycle by cycle phase peak over-current detection (desat) and UVLO (low volt) shutdown the ACPL-332J will be used for driving the Fairchild SuperfetII.
OVERVOLTAGE PROTECTION
Over-voltage at the output (caps) of a dual phase board is detected by a cheap and reliable LM211 comparator.