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How about using some electronics to solve this instead of removing the hardware for machine work.
But first we must know for what function does the controller use the pulse width? Is it measuring speed by counting pulses, or counting pulse edges, or actually measuring the width to calculate a speed?
It sounds as though it requires a minimum width in order to detect that an edge has occurred? The problem with inductive pickups such as seen in the video is that the amplitude of the pulse can be reduced at higher RPM--the quicker passing of the bolt head leaves less time for the induced signal to rise to full voltage. If that is the case then some sort of signal amplifier may be needed to boost it to a level to be detected in the controller.
But if it is just the width, then a digital logic "OR" gate could be used to add some delay to the pulse falling edge and give you a longer pulse width. This would be in a logic chip such as a 4071 quad OR gate, seen here:
https://en.wikipedia.org/wiki/OR_gate#/media/File:CMOS_4071_diagram.svg
The amount of delay or extension to the pulse width is set by the R*C time constant, so it can be adjusted to suit the situation. For example to make a delay constant of 200 usec use a 2k resistor and a 0.1 uF capacitor.
But first we must know for what function does the controller use the pulse width? Is it measuring speed by counting pulses, or counting pulse edges, or actually measuring the width to calculate a speed?
It sounds as though it requires a minimum width in order to detect that an edge has occurred? The problem with inductive pickups such as seen in the video is that the amplitude of the pulse can be reduced at higher RPM--the quicker passing of the bolt head leaves less time for the induced signal to rise to full voltage. If that is the case then some sort of signal amplifier may be needed to boost it to a level to be detected in the controller.
But if it is just the width, then a digital logic "OR" gate could be used to add some delay to the pulse falling edge and give you a longer pulse width. This would be in a logic chip such as a 4071 quad OR gate, seen here:
https://en.wikipedia.org/wiki/OR_gate#/media/File:CMOS_4071_diagram.svg
The amount of delay or extension to the pulse width is set by the R*C time constant, so it can be adjusted to suit the situation. For example to make a delay constant of 200 usec use a 2k resistor and a 0.1 uF capacitor.
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