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The 18650 - 13s10p Project - 48V x 34Ah

15908 Views 95 Replies 8 Participants Last post by  PStechPaul
The 18650 - 14s10p Project - 48V x 34Ah

This is to chronicle a project to construct a 1.6 kWh module from 18650 cells. The configuration is 13s10p (edit: upgraded to 14s10p) using 130 (140) "Grade A" Panasonic NCR18650B (edit: unprotected) li-ion cells. These cells are nominally rated at 3.4 Ah and guaranteed to 3.25 Ah.

The first order of 100 cells (at US$3.28 each - $272/kWh) was received from Shanghai today and I have started testing individual cells, and plan to test all cells. Shipment was by air and arrived in 4 days. Shipment adds another $1 to the price, and with transaction costs amounts to $1.24 a cell. I was told it is not possible to ship via sea, and must be by air.

It has been observed that cells purchased from some suppliers in China have contained some fake mislabeled re-cycled cells or fake low-quality low-capacity Chinese cells. I plan to test for capacity, weight, impedance, and thermal behaviour during charging.

Photo of shipment - each cell has an individual white paper box with a safe handling warning, and a pair of these boxes are inside a green box with the same warning. These boxes were not from the original manufacturer (Panasonic / Sanyo). Each cell had a sticker that covered the manufacturer's label that says NCR18650B without giving the capacity. The sticker says "18650 3400 mAh 3.7V". There are also lot numbers on the cell's wrapping and probably on the steel casing, which may give a clue to the origins of the cell.


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Is a FET needed for level shifting communication?
FYI an npn-pnp pair can level shift as well, the problem is the difference in potential where the cpu are referenced and the protection diodes on the io pins will clamp high or low (thus protecting).

fwiw there is a lot of bms discussion and a fair amount of my own blather here:

though I should maket an update to the resistor network post, as it has a problem. And the current shifting version after this diagram should have better noise immunity.
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I am trying to get my head around this. In one of the other designs linked, there was no need for disabling the voltage reference for balancing. Only one FET for the balancer and the voltage reference appeared to draw current only when voltage exceeded reference?
Yes, there's a few ways to use voltage references, this would work also if you wanted to only top balance, but you wouldn't have direct control over the balancing if you wanted to balance at a different state of charge. The voltage reference draws a minimum of 40uA for the one I saw, lower power ones exist but are more expensive.

Is a FET needed for level shifting communication? Communication is one way from upper to lower board only, and is serial. Could you not use another zener/resistor to drop the voltage so that when out is low, there is no current drain? Assuming daisy chain serial communication, it can be as many bytes as you want, and you want it to be synchronous and periodic I think. If the controller detects no pack charge or discharge, then it would minimize the polling, and eventually put all on standby. A data space of 128 bytes would be sufficient with logarithmic coding of the voltage. No board ID needed in the packet, as position of data is the ID.
From my calculations you would always need a FET, in the worst case, say you had a divider/zener setup, you set output low on the top MCU, the voltage is then VCC of the bottom board (GND of the top board = VCC of the bottom board), your voltage divider would divide that by say 3.5 to meet the Vil requirements of the bottom MCU, then Vin to the bottom MCU is VCC/3.5. For the high case, you need to exceed Vih requirement of the bottom MCU, with the same 3.5 divider your Vin would not be high enough. There's not a single divider value that meets both criteria over the worst case ranges (cell 1 voltage = 3V, cell 2 voltage = 4.2V, and vice versa). If you want it to work over a narrower range, sure that's fine, but that's a limitation you'd need to be aware of. With a P-FET, the output is true 0 to VCC of the bottom device. The output pin of the MCU however is clamped to its own GND and VCC via internal diodes.

Just so I'm not crazy I threw it in LTspice and it works:

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Here's the schematic/layout for the "1s" stackable BMS:

To keep the ATtiny102 (for lower cost and smaller package) and still have a temperature sense function, I added a thermistor which would only be active when the ADC is enabled (supply is ADC_EN pin), and would be read out on the BAL pin, which is normally an output to control the shunt. This has the obvious downside of turning on the shunt when the temperature is below 15 C (depending on the threshold voltage of the shunt N-FET), but you could look at it as a plus of having a free battery heater circuit ;)

The board is 0.425 x 1.175". Could be optimized a bit further, this is just a first pass to connect all the nets together.
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rev0 - I will be happy to do the coding once you have your stackable design completed and there are samples produced. After all, ahem, I was a C programmer a couple of decades ago - :D . Also need a controller design.
Another example of a MC based stackable BMS and level shifter.

I hope the ATtiny has all the necessary functions for the job and easy to program/debug. Cost should not be the deciding factor for the MC, I think.
I'd suggest we start a new thread and define some solid goals, otherwise we'll all be trying to work toward different goals. My goal was cost and simplicity, which was achieved using a Nissan Leaf BMS. Your goal seems to be a stackable/flexible system with more capability. I might also add that assembly effort should be a consideration; with a multi-cell system, you only need to solder a balancing lead to the pack, rather than soldering 2 wires to the + and - of every series cell/group.
Yes, a multi-cell system (8 or 16 balancers) on one board makes more sense. The microcontroller can sense if there is a voltage present, and if not, just act as a message relay. Also the main controller can go on the board, plus any other stuff needed such as optoisolator, current sensors, LCD display drivers, control buttons, and current cutoff FETs. The LCD display could be eliminated if there is remote console. So by stackable I do not mean individual balancers, but a daisy chain. They would want to be on one board.

Simplicity is paramount. For me there is no difference between a cost of $0.5 or $5 per MC, if the better MC has more storage and is easier to program/debug, better ADC, Rx Tx, etc. I don't have the experience, so I cannot really comment on stackable vs. Leaf BMS. I would consider Leaf BMS to be more complex, and certainly less flexible. For example the stackable can be used for LFP or 4.35V LiPo. And there will be other battery technologies in the future coming down the pipeline.

Of course when I get to the point where I am able to program an ATtiny or ATmega, I would know more about the advantages/disadvantages.
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The Microchip PIC16(L)F1783 has a 12 bit differential ADC and a fixed selectable internal voltage reference, and costs well under $2 in moderate quantities. The "L" version is limited to 3.6 volts, otherwise max 5.5 volt supply.

I have also considered the possibility of measuring the voltage on several taps of a battery pack by applying the voltages through MOSFET switches to a resistor and a capacitor connected to a comparator, and use the time of charging to determine the voltage. As long as the resistor and capacitor values are known and stable with temperature, the time can be determined very accurately to as many as 16 bits. A mux like the DG408 can be used up to 44 volts, but otherwise higher voltage MOSFET switches could read even higher.

I haven't fully worked out details, but take an example of 8 cells at 3.2 volts each, with a 500k resistor and a 100 nF capacitor, and a comparator with a reference of 2.048 VDC. For the voltage at the top, 25.6V, the setpoint is reached in 4.181 mSec, while for the single cell at 3.2V, it takes 51.103 mSec. A 1 MHz counter would provide precision of 25.6/4181 = 6 mV, and 3.2/51103 = 0.06 mV.
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PstechPaul - great idea. Is it going to be easy to implement?

You would still need a Mux to activate the FETs. And another Mux to drain the capacitor. And then a whole bunch of calibrations. And then another MC and optoisolator to report the findings. If you put 16 of these on a board, you would need to put a few DG408 in series. All can be done. But your first suggestion of a PIC16L may be simpler, and no need for bypass FET Mux, counter, oscillator, etc. me thinks ...
I think it would be easier to implement than you think. A single DG408 would allow connection of any of eight voltage points from 3.2V to 25.6V. Once the comparator detects the charge to the setpoint, the MUX would be turned off, and a MOSFET across the capacitor could discharge it for the next reading. All this can be done with 3 I/O pins for address select, one I/O pin for enable, one I/O pin for discharge, and one analog input for the comparator. Six pins.

The effect of each measurement would be the energy loss of

0.5 * 100nF * 2.4V ^ 2 = 200 nanoCoulombs

The energy of a 10 A-h 3.2V cell is 32 * 3600 W-sec (Coulombs)

Even with one measurement per second it would take 3600/200 = 18E9 seconds or 5 million hours. Another way to look at it is that the measurement is equivalent to a maximum of 3.2V/500k = 6.4 uA which by itself would drain the cell in 10/6.4 = 1.56 million hours. In reality the sample has an average current of roughly 3 ua and a duty cycle of 51 mSec/sec or about 40 times less.

In an actual circuit, there will be other more significant current draw. I envision the microcontroller powered by the low cell in the stack, so it will lose more charge and eventually become unbalanced. But the same circuit could be used to perform charge balancing by discharging the other cells through the sampling resistor, and keeping the discharge MOSFET across the capacitor ON. The 500k would only be 1.6 uA on a 3.2V cell. Another problem is that all cells from the chosen tap on down would be discharged, so that might not work as desired. However, adding an opto-isolator and load across all the upper cells would probably do the job with minimal additional components. And, of course, fully selectable cell discharge could be done with eight isolators and resistors. This could easily provide 20 mA of load.
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Wow! Terrific. Thanks. More food for thought.

I like it - it does away with the shunt FETs and the multiple MCs. Certainly wins the simplicity beauty contest.

Hmmm ... I don't see the balancing act. I think you said that the same sampling circuit will be used to bypass and top balance?

What does zener D1 do? And why are Tx and Rx unused? What are PGC and PGD, do they go to the optoisolator for the next board? Would you also be drawing the over and under voltage cutoff FETs?

Can DG408 handle the bypass current? I think the specs said 100 ohm, which would be too high. Should be below 40 ohm. Maybe three DG408 in parallel?
The idea was to provide a very small amount of balancing to compensate for the additional current from BT1, which is used to power the PIC. But then I realized that it would drain all cells below the chosen tap. So that won't work.

I show an opto-isolator U3 that is not connected. If I used a 28 pin PIC there would be eight more I/O pins each of which could turn on 8 isolators that could be connected across each cell in the stack, to draw as much as 30 mA from selected cells to perform balancing. Actually, it could use a quad darlington opto that can handle up to 160 mA per channel, and costs only about $2:

D1 is actually a Schottky diode that isolates the PIC Vdd from the cell BT1. It might not be needed. Actually I thought it might be better to power the PIC using an inexpensive DC-DC converter from the 12V accessories battery. But I think the ideal design would be self-contained and run off one of the cells.

The Tx and Rx are the serial connections to the USART. I planned to connect those signals to a Bluetooth module for communication with a computer or a "motherboard" that would handle communications. I haven't fully thought through this part of the design. Another method would be a daisy-chain from module to module, possibly using opto-couplers or digital isolators or other method. Power consumption must be considered. Bluetooth modules draw something like 20-50 mA.

PGC and PGD are just the programming pins.

I would also like to design the dynamic charge shuttling version that requires two DG408s. It might even be able to extract voltage from each cell and transfer it to the PIC power supply. It should be easier to implement, as it would use the full range of the 10 bit ADC for each cell measurement. DG408 is inexpensive - a little over $1 in 100 piece quantity.
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Well, cell shunting is really needed - having one optoisolator shunt per cell - sounds very interesting and creative. At 600 mA per IC quad optos, heatsinks would be needed. It is sort of an overloading of the concept of an opto to use it as a shunt ...

How about two DG408 and shunt shuttling? Again the problem will be the high impedance of the DG408.

Also pls note that the accuracy of BT8 sensing is far less than BT1. Because you would need to subtract BT7 from BT8, and these are two high voltage senses.

I am not familar with a Schottky - how would that isolate VDD from BT1? After all, VDD is being supplied by BT1.

The board needs to communicate to a central MC to do the over and under voltage cutoff, and also to communicate to sibling boards, because 8 cells are just not enough. So I think there should be a half-duplex opto to daisy-chain boards. If let's say 27s cells are being managed with four boards, then blue tooth may be a problem.

Charge shuttling - not worth the trouble. Just drain BT1 with balancing and standby for the PIC.

I think one really needs a board with at least 16 cells instead of 8.
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The opto-isolators for shunt balancing are probably most effective and relatively inexpensive. Resistors should be added rather than dissipating the power in the device. Something like 10 ohms for 300 mA at 3 volts. Only 900 mW. Might be able to use a 1 watt LED instead?

The precision of the top voltage measurement is only 6 mV because of the limitation of the maximum count for the single cell measurement. Perhaps a two channel by 4 MUX like the DG409 could be used. One set of four switches would use 250k resistor and 220 nF capacitor would take 9.6 mSec for the 4th cell at 12.8V, so 9600 counts and 1.3 mV resolution. The first cell 3.2 volts takes 56.2 mSec for 0.05 mV/count. The higher 4 cells could use 500k and 470 nF, so 24.8 volts takes 19.6 mSec and 16.0 volts takes 32.2 mSec. That represents 1.2 mV/count and 0.5 mV/count.

Another "trick" would be to change the setpoint of the comparator to 1.024 volts to reduce the number of counts for the lower voltages. And also it's possible (and maybe easier) to change the clock rate for the counter depending on the voltage tap to be measured.

The isolation of the power supply from BT1 with the Schottky diode just allows the voltage to stay constant (depending on the power supply capacitor and load), if the battery voltage drops because of a heavy current load on the pack. It may even be good to use a small lithium cell to power the controller without drawing anything from the pack, except the 25.6 volts for the DG408.

Communication could use the Txd and Rxd from the USART, through digital isolators. The Si8621A has two channels, draws less than 2mA, handles up to 1 Mb/sec, and costs about $1.00.

This discussion has been interesting, but perhaps it should be transferred to that for BMS guidelines.
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