[PStechPaul]

It's actually TXM and RXM (for Master). They will be connected to another PIC in the master unit, which has yet to be designed. The ISO7221 is a logic level digital isolator. I still need to finalize the slave design by adding the power supply connection, probably through a Schottky diode to cell #1. I think I will post this design on sci.electronics.design where there are lots of experts who might be able to comment and offer suggestions and caveats. I don't think it should be quite so complicated. Maybe someone has the schematic for the DG408 and DG409.

 

[bradleyk]

ahh, yes, you are going to have each slave connect to a master.

I was planning on have master -> slave(1) -> slave(n-1) -> slave. with each slave translating the voltage.

 

[PStechPaul]

I got some good suggestions from folks in sci.electronics.design. Mostly, it helped me to rethink the concept, and I have been able to greatly simplify the MOSFET design. I should be able to use just PMOS devices biased by a pull-down for each pair. PMOS will work for any voltages more than about 2V above ground. It's really not necessary to sample the low tap of the stack - it's already GND. Here is a simulation:

However, there is a problem. A similar cell measuring across V3, but turned off, will conduct through the body diodes and cause heavy current flow and erroneous readings. Here is that simulation, ugly though it might be:

I will need to see if my original design has the same problem.

 

[PStechPaul]

Here is a simulation showing a single analog MUX element using two PMOS devices in back-to-back series. This shows that it properly samples input voltages down to about 2.5 volts and up to the supply rail:

That seems to work. The following shows the MUX reading a high cell while another element is connected to a lower cell, but not turned on:

 

[rev0]

I suppose you don't like dealing with SMD parts, but here's an option for a regulator, 3.3V 100mA with 3.5uA quiescent current, $0.70 each and 36V capable: https://www.digikey.com/product-detail/en/richtek-usa-inc/RT9058-33GV/1028-1253-1-ND/4021246

 

[PStechPaul]

I don't mind SMT parts - in fact I prefer them now, even for prototypes. That does look like a good part, but I think a switching buck regulator might be better. A linear regulator draws the same input current as output, so when the processor draws, say, 5 mA, the linear regulator will drop 10 volts on a 13.3 volt supply. Here is a simple buck regulator that draws about 2.4 mA from a 20v supply with a 5.1 mA 3.4 V load:

I found a low power dual op-amp with a high accuracy 2.5 reference for less than $1 each:
http://www.mouser.com/ds/2/389/tsm103w-974403.pdf

There may be other lower current designs. This device draws as much as 2 mA on a 30V supply.

 

[rev0]

I don't mind SMT parts - in fact I prefer them now, even for prototypes. That does look like a good part, but I think a switching buck regulator might be better. A linear regulator draws the same input current as output, so when the processor draws, say, 5 mA, the linear regulator will drop 10 volts on a 13.3 volt supply. Here is a simple buck regulator that draws about 6 mA from a 20v supply with a 5 mA 3.4 V load:

I found a low power dual op-amp with a high accuracy 2.5 reference for less than $1 each:
http://www.mouser.com/ds/2/389/tsm103w-974403.pdf

There may be other lower current designs. This device draws as much as 2 mA on a 30V supply.

My thinking is the whole design should use as little current as possible, and buck converters tend to be very inefficient at low load. Here's one that draws 25uA at no load: https://www.digikey.com/product-detail/en/richtek-usa-inc/RT6208GE/RT6208GECT-ND/5639579 You can see the efficiency drops off a cliff below 1mA, which it would spend a lot of time in (when the BMS is in sleep/standby mode for example). I would prefer a linear regulator mostly because I'm lazy and like to keep the parts count low

 

[PStechPaul]

Linear Technology has some micropower buck regulators, but most of them are more than $5. Microchip has a MCP16301 that works on 4-30V and 600mA output with 7uA shut-down and 2mA quiescent, for $1.10/1 and $0.76/100, in an SOT23-6 package. There is also an SC4530 for 3-30V and 300mA output with 19 uA quiescent, for $1.43/1 and $0.76/100, in a tiny MLPD-W-8 package.

But the easiest method may be to use the lowest cell in the pack, and then perform charge balancing. Perhaps it would be possible to charge the bottom cell from the entire pack? For efficiency, The pack voltage could be applied to an inductor which would then apply the current to the lowest cell. This would be basically a buck regulator, but controlled by the PIC itself. Four cells at 3.5V each (14V) applied to a 470uH inductor will reach 100mA in 3.35 uSec. A 470uH 140mA inductor is only about $0.25/1 and $0.14/100. I'll do a simulation to see how it works.

Here it is:

There may be a challenge switching the high side MOSFET from a low side MOSFET using 3V logic.

 

[PStechPaul]

I made a cheap gate driver using an NPN and PNP transistor driven by a low gate voltage NMOS device. Note that the bottom cell contributes the 3.2 mA into the 1k load continuously, and the entire pack only draws significant current (peak 260 mA) for 13 uSec out of 250 uSec that the inductor is being charged. Then it transfers its charge through D1 into the bottom cell in 31 uSec.

 

[bradleyk]

that is an idea. simplicity of single cell supply, with even cell drain.

what is d3 needed for?

also as the regulator is driven from a micro, it should be easy to replace d2 with another fet driven by the micro with an interleaving pwm to increase efficiency.

also you should be able to connect the collector of Q2 to C1, to improve the efficiency of the driver, tho that will be ~2.5nf per switch. ) 0.8khz switching freq = ~24uA

this is tempting to design a balancing charger.

 

[PStechPaul]

You are right - D3 is not needed. I added it at one time when it seemed to help. I don't know much about interleaving PWM, and it sounds a bit more complex than what is needed. It does seem to work better with Q2-C connected to C1. Thanks for the idea.

Here is the complete schematic at this point:

The simulation (I added a zener for gate protection in the case of pack voltage >20):

And the LTSpice ASCII file:
http://enginuitysystems.com/pix/electronics/BMS_Low_Cell_Charger_3.asc

 

[PStechPaul]

I have been working on a final prototype and I have a preliminary layout that fits on a 2" x 6" PCB. It could be even smaller. I may commit to copper and FR4 pretty soon.

Meanwhile, I have also considered the simpler approach of using a DG409 for 4 cells or two DG408s for eight cells. Instead of the flying capacitor, I looked into using a high CMRR instrumentation amplifier, but only a few will handle inputs at the supply rail. The LT1636/7 is the only one I found, and it is actually an op-amp. It will work on 44 volts, and costs about $3 in single quantity.

So, I got an idea of using a matched pair of PNP BJTs and a few resistors to translate the voltage of an upper cell to ground. Here is the simulation I came up with, and the BC857B matched pair is only about 50 cents. R3 and R4 simulate the channel resistance of the MUX:

Here is the LTSpice file:
http://enginuitysystems.com/pix/electronics/Cell_Monitor.asc

It looks like a 1 mSec sample is sufficient to get a reading within 1 mV and the circuit only draws about 50 uA while reading. The current draw is the same when reading V2. The low cell V4 would be read directly. This looks too good to be true. Tell me if there is some sort of "gotcha"!

 

[bradleyk]

That is awesome. Looks like the same solution I was going to use for the RX slave to master, but i have never used it.
My thoughts were, how close do they need to be matched? and then how does ageing affect the accuracy, this is going to be temperature dependant.

I'm thinking I might just throw up a design on a PCB and test it.
The next question is cell balancing. this should work cheaply for accurate voltage measurement.


resistors don't need to be the same. if you're using an internal 2.56v reference. and want to measure 4.5v R2 = 25.8k = (2.56-0.5)v/(4.5-0.5)v *50k
but this will have a side effect as there is an offset of ~0.5v(current dependant) form the transistors

 

[PStechPaul]

I was able to get somewhat better accuracy by making R2 50.2k, but there is still an error related to the common mode voltage.

I have found a problem. Measuring the second lowest cell, the reading is adversely affected if the lowest cell is significantly lower in voltage.
Here is what I found (*** indicates significant error):

V3=4.0 V4=3.0 Vout=3.558 ***
V3=4.0 V4=4.0 Vout=3.994
V3=3.5 V4=3.0 Vout=3.476 ***
V3=3.5 V4=3.5 Vout=3.495
V3=3.2 V4=2.5 Vout=3.031 ***
V3=3.2 V4=3.0 Vout=3.197
V3=3.2 V4=3.2 Vout=3.197
V3=3.2 V4=3.5 Vout=3.197
V3=3.0 V4=3.0 Vout=2.998
V3=2.5 V4=3.0 Vout=2.499
V1=3.5 V4=3.0 Vout=3.503
V1=3.0 V4=3.0 Vout=3.001
V1=2.5 V4=3.0 Vout=2.504

Image:

LTSpice: http://enginuitysystems.com/pix/electronics/Cell_Monitor.asc

I thought it might be better to use a lower value resistor for R2, to get a voltage of 1/2 the cell value:

V3=4.0 V4=3.0 Vout=1.921 -4.0%
V3=4.0 V4=4.0 Vout=1.921 -4.0%
V3=3.5 V4=3.0 Vout=1.721 -1.6%
V3=3.5 V4=3.5 Vout=1.722 -1.6%
V3=3.2 V4=2.5 Vout=1.601 OK
V3=3.2 V4=3.0 Vout=1.601 OK
V3=3.2 V4=3.2 Vout=1.601 OK
V3=3.2 V4=3.5 Vout=1.602 OK
V3=3.0 V4=3.0 Vout=1.521 +1.4%
V3=2.5 V4=3.0 Vout=1.321 +5.7%
V1=3.5 V4=3.0 Vout=1.723 -1.5%
V1=3.0 V4=3.0 Vout=1.523 +1.5%
V1=2.5 V4=3.0 Vout=1.323 +5.8%

Image:

LTSpice: http://enginuitysystems.com/pix/electronics/Cell_Monitor_2.asc

I also played around with the same circuit for 12V batteries:

Divided by 10:
V3=14 Vout=1.314 -6.5%
V3=12 Vout=1.201 OK
V3=10 Vout=1.088 +8.8%
V1=14 Vout=1.315 -6.5%
V1=12 Vout=1.203 OK
V1=10 Vout=1.089 +8.9%

Image:

LTSpice: http://enginuitysystems.com/pix/electronics/Cell_Monitor_12V.asc

No division:
V3=14 Vout=12.572 -11.3%
V3=12 Vout=12.003 OK
V3=10 Vout=10.005 OK
V1=14 Vout=14.034 +0.2%
V1=12 Vout=12.032 +0.3%
V1=10 Vout=10.030 +0.3%

Image:

LTSpice: http://enginuitysystems.com/pix/electronics/Cell_Monitor_12V_1.asc

 

[PStechPaul]

I decided to try the same circuit using a pair of PMOS devices. It appears to work pretty well!

Very good for 3V nominal lithium cells:

V3=4.0 V4=3.0 Vout=4.002
V3=4.0 V4=4.0 Vout=4.002
V3=3.5 V4=3.0 Vout=3.502
V3=3.5 V4=3.5 Vout=3.501
V3=3.2 V4=2.5 Vout=3.201
V3=3.2 V4=3.0 Vout=3.201
V3=3.2 V4=3.2 Vout=3.201
V3=3.2 V4=3.5 Vout=3.201
V3=3.0 V4=3.0 Vout=3.001
V3=2.5 V4=3.0 Vout=2.501
V1=3.5 V4=3.0 Vout=3.502
V1=3.0 V4=3.0 Vout=3.001
V1=2.5 V4=3.0 Vout=2.501

Image:

LTSpice: http://enginuitysystems.com/pix/electronics/Cell_Monitor_PMOS.asc

Almost as good for a 12V battery pack:

V1=10V V4=12V Vout=10.001
V1=12V V4=12V Vout=12.002
V1=14V V4=12V Vout=14.003
V3=10V V4=12V Vout=10.001
V3=12V V4=12V Vout=12.002
V3=14V V4=12V Vout=13.996
V3=14V V4=10V Vout=13.006 -7.6%
V3=16V V4=10V Vout=14.008 -14.2%
V3=12V V4=10V Vout=11.992

Image:

LTSpice:
http://enginuitysystems.com/pix/electronics/Cell_Monitor_12V_PMOS.asc

I don't know how closely matched the MOSFETs need to be. I'll have to look for matched pairs.

 

[PStechPaul]

I just finished laying out the BMS using discrete MOSFETs and flying capacitor and low cell buck charger.

 

[PStechPaul]

Well, I did finally build this circuit, but I ran into several problems. First and foremost, perhaps, was that I used the wrong decal for the PIC16LF15345, so I had to bend the leads under the package to solder to the pads:

That worked well enough, and then I spent some time working on the PIC code. Eventually I got the ADC working and the USART which I connected to a Bluetooth module so I could read cell voltages using TeraTerm:

Those are not correct, because there were some other problems on the PCB. The PMOS device decals were incorrect (gate and source switched), so I had to turn them upside down and add some ugly jumpers:

But, more importantly, there are some basic design flaws that do not properly pass the voltage on the flying capacitor to the ADC. I'm not 100% sure just what the problem is, but the full voltage of the four cell taps gets put to the input of the ADC for the top 3 measurements, and the bottom cell does not take MUX- to ground.

It looks like this topology is at a dead end. There are some ways to fix it, but that involves some major changes and will probably add too much complexity as well as being less efficient. So now I have four blank boards that are essentially junk, not even usable for other purposes. The low cell charger circuit works pretty well, but it's probably not all that useful. Some take-away from this:

1. The DG408 and DG409 circuits can do the flying capacitor method for battery packs up to 8 cells and about 36V maximum.

2. The opto-MOS SSRs can be used for packs of 12V SLAs, up to 8, or nominal 8*12=96V.

3. It may be best to provide a buck switching supply to use full pack voltage for the PIC power supply. It can charge a fairly large capacitor and then shut down until the voltage drops low enough to need another charge cycle. It can provide full 3.3V or 5.0V for the Bluetooth module, but it is really only for development purposes. The final design will use digital isolators to communicate with a master module.

I will probably remove some of the more expensive components from this PCB and junk it. Anybody want some boards to play with?

 

[patrick@drm.ch]

Thank you all for some of the interesting input. I have been developing my own BMS which transmits voltages and temperatures via bluetooth to a network module (https://www.drmiot.com/my-bluetooth-bms/). It works very well but some of the topics proposed by Siwastaja are worth considering.